DEIF PPM/DGM熱電偶輸出模塊
雙列直插式開關(guān)SW3-回路模式
雙列直插開關(guān)SW3啟用或禁用ROM校驗(yàn)和，將環(huán)路識(shí)別為工廠環(huán)路或INFI-NET環(huán)路，識(shí)別節(jié)點(diǎn)中的NIS模塊，并將環(huán)路通信速度設(shè)置為500千波特（工廠環(huán)路）、2兆波特（INFI-NET）或10兆波特（NFI-NET）。參考表3-3。在提供的空間中記錄雙列直插式開關(guān)SW3的設(shè)置。雙列直插開關(guān)SW3極1決定了網(wǎng)絡(luò)處理模塊的兼容性。將極1設(shè)置為連接兩個(gè)回路的節(jié)點(diǎn)的一個(gè)位置。對(duì)于所有其他節(jié)點(diǎn)類型，將極1設(shè)置為零。極點(diǎn)2啟用或禁用ROM校驗(yàn)和。Bailey建議在安裝NIS時(shí)啟用校驗(yàn)和，以充分利用車載診斷。極3啟用內(nèi)部測(cè)試，正常運(yùn)行時(shí)必須禁用該測(cè)試。極點(diǎn)4與極點(diǎn)3相結(jié)合，使得節(jié)點(diǎn)對(duì)其他節(jié)點(diǎn)來說似乎很忙。極5啟用前面板LED的通道空閑狀態(tài)顯示。如果通道1空閑，A組LED將大約每秒閃爍兩次。如果通道2空閑，B組LED將閃爍。通道空閑顯示用于警告存在回路完整性問題。第六極啟用排除正常NIS模塊操作的診斷測(cè)試。極點(diǎn)7和8決定環(huán)路速度和環(huán)路模式。
雙列直插式開關(guān)SW4-輸入/輸出模塊地址和計(jì)數(shù)器
NIS模塊的I/O地址可以從0到7。雙列直插式開關(guān)SW4的一極至三極設(shè)置NIS模塊的I/O模塊地址。有關(guān)I/O模塊地址設(shè)置，請(qǐng)參閱表3-4。極點(diǎn)4至8設(shè)置NIS模塊使用A組和B組面板LED顯示的板載事件和錯(cuò)誤計(jì)數(shù)器的地址。表3-5列出了事件計(jì)數(shù)器。表3-6列出了錯(cuò)誤計(jì)數(shù)器。在提供的空間中記錄雙列直插式開關(guān)SW4的設(shè)置。計(jì)數(shù)器使用計(jì)數(shù)器0A的示例跟蹤接收的多播消息的數(shù)量，不包括那些始發(fā)的消息。要在前面板LED上顯示此計(jì)數(shù)器，請(qǐng)按如下方式設(shè)置雙列直插式開關(guān)SW4：極四=零、五=一、六=零、七=一和八=零NIS模塊上有六個(gè)跳線，用于設(shè)置接收器模擬電路的通信速率。跳線位置見圖3-1。所有六條跳線必須設(shè)置在同一位置。跳線設(shè)置說明絲網(wǎng)印刷在NIS電路板的左上角。跳線設(shè)置必須與雙列直插式開關(guān)SW3的第七和第八極設(shè)置的通信速率相匹配。圖3-2顯示了在各種環(huán)路模式下跳線的引腳。此圖顯示了在面板位于左側(cè)的情況下查看NIS電路板頂部時(shí)引腳的位置。
DIPSWITCH SW3 - LOOP MODE
Dipswitch SW3 enables or disables ROM checksums, identifies the loop as a Plant Loop or INFI-NET loop, identifies the NIS module in a node, and sets the loop communication speed to 500 kilobaud (Plant Loop), 2 megabaud (INFI-NET) or 10 megabaud (INFI-NET). Refer to Table 3-3. Record the dipswitch SW3 settings in the space provided. Dipswitch SW3 pole one determines network processing module compatibility. Set pole one to the one position for a node that connects two loops. Set pole one to zero for all other node types. Pole two enables or disables ROM checksumming. Bailey recommends that the NIS be installed with checksumming enabled to take full advantage of the on-board diagnostics. Pole three enables internal testing which must be disabled for normal operation. Pole four, in conjunction with pole three, makes the node appear to be busy to other nodes. Pole five enables the channel idle condition display for the front panel LEDs. If channel one is idle, the group A LEDs will flash on and off about twice per second. If channel two is idle, the group B LEDs will flash. The channel idle display is intended to serve as a warning that a loop integrity problem exists. Pole six enables diagnostic tests that preclude normal NIS module operation. Poles seven and eight determine loop speed and loop mode.
DIPSWITCH SW4 - I/O MODULE ADDRESS AND COUNTERS
The NIS module can have an I/O address from zero to seven. Poles one through three of dipswitch SW4 set the I/O module address of the NIS module. Refer to Table 3-4 for I/O module address settings. Poles four through eight set the address of the on-board event and error counters that the NIS module displays using the group A and B faceplate LEDs. Table 3-5 lists the event counters. Table 3-6 lists the error counters. Record the dipswitch SW4 settings in the space provided. Example of Counter Usage Counter 0A keeps track of the number of multicast messages received excluding those originated. To display this counter on the front panel LEDs, set dipswitch SW4 as follows: pole four = zero, five = one, six = zero, seven = one, and eight = zero There are six jumpers on the NIS module that set the communication rate of the receiver analog circuit. See Figure 3-1 for jumper locations. All six jumpers must be set in the same position. Jumper setting instructions are silk screened on the upper left corner of the NIS circuit board. The jumper setting must match the communication rate set by poles seven and eight of dipswitch SW3. Figure 3-2 shows which pins to jumper for various loop modes. This figure shows placement of the pins when looking at the top of the NIS circuit board with the faceplate on the left.
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